4 Gbps Scalable Low-Voltage Signaling (SLVS) transceiver for pixel radiation detectors

Lukasz A. Kadlubowski, Piotr Kmon

We report on the design of 4 Gbps Scalable Low-Voltage Signaling (SLVS) transceiver in 40 nm CMOS technology for application-specific integrated circuits (ASICs) dedicated to pixel radiation detectors. Serial data are transmitted with ±200 mV differential swing around 200 mV nominal common-mode level. The common-mode interference minimization is crucial in such a design, due to EMC requirements. For multi-gigabit-per-second speeds, the influence of power supply path becomes one of the most challenging design issues. Accurate modeling of supply pads at each step of the design is necessary. Our analysis shows that the utilization of multiple bond wires as well as separate power supply pads for bulk terminals connection of the transistors is essential to ensure proper operation of the transceiver. The design is a result of various trade-offs between speed, required operating conditions, common-mode interference as well as power and area consumption.