Universal computational accelerator for PCs

During the presentation there will be introduced a concept of a new framework, which is intended for a rapid development of C libraries that might be used in FPGA-accelerated applications.

The framework's principle of operation is divided into a few basic steps. In the beginning, user has to prepare a list of C function headers, that are going to be computed using FPGA. After that, the headers are used for generating VHDL templates for computing units inside FPGA, main FPGA controller, C library and Makefile.
User has to prepare content of the VHDL templates to decide what is going to happen inside FPGA after calling certain functions in C applications. The last step is to compile everything together (bitstream & library) into a single shared library file, that can be used for writing C applications in a traditional way.
After running an application that uses the library prepared in the way described above, at first it is checked if the bitstream is properly loaded. If not - the library takes care of downloading integrated bitstream into FPGA. After that,
every time when any function that comes with library is called, function parameters are transferred into FPGA usign platform specific driver. when computations are finished, return values are passed the same way back - allowing to increase performance of application usign FPGA.