Hardware implementation of artificial multi-stable neuronal model on FPGA-based architecture

This paper describes the development of embedded software for the implementation and testing of the basic behavior of
the artificial multi-stable neuron model with the aim of the hardware architecture of programmable logic integrated
circuits (FPGA). The real behavior and function of the biological neuron with linearized activation characteristics in the
programming language VHDL was investigated and implemented. The base model is a model of a three-stable neuron
with three asymmetric dendrites. To develop a hardware model, a computational mathematical model of a neuron is
used, based on which a corresponding discrete model was synthesized. The model consists of the following modules: an
input block, a timer, a clock generator, a threshold element, and an output signal generator. It is shown that the
implemented system allows to synthesize a neural model with a predetermined number of stable discrete states, with the
capability of neuron to change its stable state, depending on the input vector. Each stable state corresponds to the output
function of the neuron. The developed model of artificial neurons was implemented on the DIGILENT BASYS II
SPARTAN-3E XC3S100E FPGA kit using WebPACKTM ISE 13.3 environment. The results of the work allow to
investigate high-speed neural networks with a dynamic structure using FPGA, which can be used for a wide range of
modern tasks such as recognition, classification of patterns and for the development of elements of artificial intelligence.
Keywords: neuronal models, mathematical models of neurons, artificial neuronal models, multi-stable neural networks,
FPGA, Spartan-3E, VHDL