Low Power Laser Driver Design in 28 nm CMOS for on-Chip and Chip-to-Chip Optical Interconnect

This paper discusses the challenges and the tradeoffs in the design of the laser drivers for very-short distance optical communications. A prototype integrated circuit is designed and fabricated in 28 nm super-low-power CMOS technology. The power consumption of the transmitter is 14 mW excluding the VCSEL that in our test has a DC power consumption of 10 mW. The active area of the driver is only 0.0045 mm^2. The driver can achieve an error-free electrical data-rate of 25 Gbit/s using a pseudo random bit sequence of 2^7-1. When the driver is connected to the VCSEL module an open optical eye is reported at 15 Gbit/s. In the tested bias point the VCSEL module has a measured bandwidth of 11.5 GHz.

Author: Guido Belfiore
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